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NCP5021
I2C Protocol
The standard I2C protocol is used to transfer the data
from the MCU to the NCP5021. Leaving aside the
Acknowledge bit, the NCP5021 chip does not return data
back to the MCU.
The physical address of the NCP5021 can be selected as
0111 001X or 0111 010X (the X being the Read / Write
identifier as defined by the I2C specification) depending
upon the digital status present at the I2CADR pin:
? I2CADR = Low 3 address = %0111 0010 = $72
? I2CADR = High 3 address = %0111 0100 = $74
In order to avoid any risk during the operation, the digital
levels are intended to be hardwired either to GND or to
Vbat prior to power up the system.
The first byte of the I2C frame shall be selected address
($72 or $74) when a Write is send to the chip.
To set up a new output current value, a full frame shall
be send by the MCU. The frame contains three consecutive
bytes and shall fulfill the I2C specifications (see Figure 6):
First byte:
Second byte:
Third byte:
I2C address, write
register selection
DATA
3 $72 (assuming I2CADR = Low)
3 %0000 0000 = internal register address
3 %0000 0000 = function / output current value
An infinite number of register selection / data pair can be send on the I2C port once the physical address has been decoded
(see Figure 7). The transmission ends when the STOP signal is send by the SCL/SDA digital code.
SCL
B7 B6 B5 B4 B3 B2 B1 B0 ACK B7 B6 B5 B4 B3 B2 B1 B0 ACK B7 B6 B5 B4 B3 B2 B1 B0 ACK
SDA
Start Conditions
I2C Address
Register Selection
Figure 6. Single Frame I2C Sequence
DATA
Stop conditions
SCL
SDA
I2C Address
Register Selection
DATA
N sequences
Register Selection
DATA
Figure 7. Multi Frames I2C Sequence
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